A low-power low-noise CMOS amplifier for neural recording applications

By Reid R. Harrison, C. Charles. IEEE J. Solid State Circuits, 2003

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Microelectrodes, Microelectronics, and Implantable Neural Microsystems (2008, methodology): “The design of on-chip amplifiers for neural probes has progressed from open-loop designs [44], [61] to capacitively coupled closed-loop designs [62], [ 63 ].”
The Design of Integrated Circuits to Observe Brain Activity (2008, methodology): “As described in [ 32 ], the input-referred noise of this”
An Energy-Efficient Micropower Neural Recording Amplifier (2007, methodology): “Fig. 1. The topology of our gain stage is similar to that in [ 8 ].”
A 60 $\mu$W 60 nV/$\surd$Hz Readout Front-End for Portable Biopotential Acquisition Systems (2007, methodology): “, 86 dB for [26]) due to the process related mismatches.”
A 2 $\mu\hbox{W}$ 100 nV/rtHz Chopper-Stabilized Instrumentation Amplifier for Chronic Measurement of Neural Field Potentials (2007, background): “1, generally sample an area of roughly 1 mm ; the NFP application does not require the fine pitch of a single-cell recording array [1].”
A low-power, low-noise CMOS amplifier for neural recording applications (2002, neutral): “This circuit was first described in [18].”