A Single Photon Avalanche Diode Implemented in 130-nm CMOS Technology
By C. Niclass, M. Gersbach, R. Henderson, L. Grant, E. Charbon. IEEE Journal of Selected Topics in Quantum Electronics, 2007
204 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Instrumentation, Ophthalmology
View Paper: https://www.semanticscholar.org/paper/b0462a488cd1c6f1408424cbc988fff816543edb
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
- Danilo Bronzi
- Federica A. Villa
- Simone Tisa
- Alberto Tosi
- J. Richardson
- E. Webster
- Franco Zappa
- L. Grant
Citations in the corpus
- Progress in Quenching Circuits for Single Photon Avalanche Diodes (2010, unknown): “ballast resistor, the parasitic capacitance is large, even 10 pF as reported in [1] and [2].”
- SPAD Figures of Merit for Photon-Counting, Photon-Timing, and Imaging Applications: A Review (2016, methodology): “Also, the presence of shallow trenches increases the density of deep-level carrier generation centers at the Si/SiO2 interface, and the limited duration and effectiveness of annealing and drive-in diffusion steps do not help in reducing impurities, traps, and defects concentrations [35], [36].”
- Scaleable Single-Photon Avalanche Diode Structures in Nanometer CMOS Technology (2011, background): “At the 130-nm process node, various devices employing a p-well guard ring have been reported, invariably with high DCR (40–100 kHz) [16].”