The time-triggered architecture

By Hermann Kopetz, Günther Bauer. Proceedings of the IEEE, 2003

979 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/ad85e7f7057556cfdbfcdf1cab560b7c970a1218

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. Edward A. Lee
2. P. Arun Raj Kumar
3. K. Åström
4. Wilfried Steiner
5. Paolo Santi
6. Michael C. Gastpar
7. Jeffrey G. Andrews
8. Andrea J. Goldsmith

In Hardware and Architecture

1. Edward A. Lee
2. P. Arun Raj Kumar
3. K. Åström
4. Wilfried Steiner
5. Alberto L. Sangiovanni-Vincentelli

Citations in the corpus

• A Perspective on IEEE Time-Sensitive Networking for Industrial Communication and Automation Systems (2019, background): “, Profinet [21], TT Ethernet [22], FTT-Ethernet [23], TTP [24], and FlexRay [25]).”
• Scheduling Real-Time Communication in IEEE 802.1Qbv Time Sensitive Networks (2016, neutral): “1Qbv [19] defines a time-based shaper functionality enabling time-triggered communication [22] at the egress ports.”
• Bibliographical review on reconfigurable fault-tolerant control systems (2003, neutral): “…software, computing platforms, and communication protocols) are highly desirable (Blanke et al., 1997; Campelo et al., 1999; Carcia, Ray, & Edwards, 1995; Hammett, 1999; Kopetz & Bauer, 2003; Lygeros, Godbole, & Broucke, 2000; Murray, Astrom, Boyd, Brockett, & Stein, 2003; Wills et al., 2001).”
• An Evaluation of SMT-Based Schedule Synthesis for Time-Triggered Multi-hop Networks (2010, background): “A TT frame fi on a dataflow link [vk, vl], f [vk,vl] i , is fully temporally specified by the following triple (as defined by the Time-Triggered Architecture [4]): f [vk,vl] i = {fi.period , f [vk,vl]i .offset , fi.length} (3) The TT frame period and frame length are given a priori; it is the task o”
• The Past, Present and Future of Cyber-Physical Systems: A Focus on Models (2015, background): “In fact, time-triggered architectures [20] classically use such a clock distribution”
• Control: A perspective (2014, background): “The time-triggered architecture is an approach to developing distributed embedded systems that seeks to attain reliability by temporal coordination [390].”