Subnanometer Linewidth Uniformity in Silicon Nanophotonic Waveguide Devices Using CMOS Fabrication Technology

By Shankar Kumar Selvaraja, Wim Bogaerts, Pieter Dumon, D. van Thourhout, R. Baets. IEEE Journal of Selected Topics in Quantum Electronics, 2010

299 citations recorded by the source corpus.

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

Silicon and silicon nitride photonic circuits for spectroscopic sensing on-a-chip [Invited] (2015, background): “SOI wafers [8,9] with a high level of process control and yield.”
Silicon-on-Insulator Spectral Filters Fabricated With CMOS Technology (2010, methodology): “of the wavelength dip of several nanometers, using the same photomask [2], [13].”
Silicon CMOS-integrated nano-photonics for computer and data communications beyond 100G (2012, background): “The variability of CDs has the strongest impact on WDM silicon photonics devices based on light interference, such as arrayed waveguide gratings [21], Echellet gratings [18], and ring resonators, the performance of which is strongly affected by the resulting random phase (path length difference)…”
Silicon Photonic Integration Platform—Have We Found the Sweet Spot? (2014, unknown): “The size of CD (critical dimension) features is typically controlled to a 3 σ accuracy of ± 8 nm in 193 nm lithography [53, 54].”
Ring Resonator Modulators in Silicon for Interchip Photonic Links (2013, unknown): “source lithography [87] and 248 nm source lithography [88] on 200 mm and 150 mm SOI wafers, respectively.”
Exploiting CMOS Manufacturing to Reduce Tuning Requirements for Resonant Optical Devices (2011, methodology): “Several noteworthy studies of manufacturing tolerances of resonant devices using CMOS high-volume manufacturing tools, optical lithography, and dry etch processes have been launched [36], [37].”