A high-speed BCI based on code modulation VEP

By Guangyu Bin, Xiaorong Gao, Yun Li, Bo Hong, Shangkai Gao. Journal of Neural Engineering, 2011

319 citations recorded by the source corpus.

Subfields: Cellular and Molecular Neuroscience, Cognitive Neuroscience, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/a07a5c569385f33aa8dda07ac767a0076f1615df

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In Cellular and Molecular Neuroscience

In Cognitive Neuroscience

In Electrical and Electronic Engineering

Citations in the corpus

Riemannian geometry for EEG-based brain-computer interfaces; a primer and a review (2017, unknown): “Note that if the phase of the SSVEP is known thanks to precise data tagging, as it is done in [32], or code modulation is used [33], one can exploit both the frequential and the temporal information, constructing a super trial mixing the strategy used here for ERP (22) and for SSVEP (27).”
EEG-Based Brain-Computer Interfaces Using Motor-Imagery: Techniques and Challenges (2019, background): “These were: (i) template matching (TM) [119–121] and statistical moments (SM) [122–124] in the time-domain, and (ii) average bandpower (A-BP) [125–127], selective bandpower (S-BP) [69,118,128] and fast Fourier transform power spectrum (FFT) [129–131] in the frequency domain.”
P300 brain computer interface: current challenges and emerging trends (2012, unknown): “Just as future SSVEP BCIs might more frequently employ newer stimulation approaches (Bin et al., 2009, 2011), P300 BCIs might also start using stimuli that move or otherwise change in ways that elicit more distinct ERPs.”
Current Status, Challenges, and Possible Solutions of EEG-Based Brain-Computer Interface: A Comprehensive Review (2020, background): “A variety of stimulus coding strategies, for instance, CDMA, TDMA, and FDMA, have already been adapted for BCI systems (Bin et al., 2011; Jin et al., 2011).”
A High-Speed Brain Speller using steady-State Visual evoked potentials (2014, background): “19, 20 These systems were considered to have highest communication speed in previous BCI studies.”
Filter bank canonical correlation analysis for implementing a high-speed SSVEP-based brain–computer interface (2015, methodology): “Bin et al (2011) reported an ITR of 108 bits min − 1 in a 32-target BCI.”