Architectural Considerations in the Design of a Superconducting Quantum Annealing Processor

By P. Bunyk, E. Hoskinson, Mark W. Johnson, E. Tolkacheva, F. Altomare, A. Berkley, R. Harris, J. Hilton, T. Lanting, A. Przybysz and 1 more. IEEE transactions on applied superconductivity, 2014

338 citations recorded by the source corpus.

We have developed a quantum annealing processor, based on an array of tunable coupled rf-SQUID flux qubits, fabricated in a superconducting integrated circuit process. Implementing this type of processor at a scale of 512 qubits and 1472 programmable interqubit couplers and operating at ~ 20 mK has required attention to a number of considerations that one may ignore at the smaller scale of a few dozen or so devices. Here, we discuss some of these considerations, and the delicate balance necessary for the construction of a practical processor that respects the demanding physical requirements imposed by a quantum algorithm. In particular, we will review some of the design tradeoffs at play in the floor planning of the physical layout, driven by the desire to have an algorithmically useful set of interqubit couplers, and the simultaneous need to embed programmable control circuitry into the processor fabric. In this context, we have developed a new ultralow-power embedded superconducting digital-to-analog flux converter (DAC) used to program the processor with zero static power dissipation, optimized to achieve maximum flux storage density per unit area. The 512 single-stage, 3520 two-stage, and 512 three-stage flux DACs are controlled with an XYZ addressing scheme requiring 56 wires. Our estimate of on-chip dissipated energy for worst-case reprogramming of the whole processor is ~ 65 fJ. Several chips based on this architecture have been fabricated and operated successfully at our facility, as well as two outside facilities (see, for example, the recent reporting by Jones).

Subfields: Artificial Intelligence, Atomic and Molecular Physics, and Optics, Condensed Matter Physics

View Paper: https://www.semanticscholar.org/paper/9b6e1e10607bc7204d0b2738266cf4ed8fd760f4

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Citations in the corpus

Quantum Optimization of Fully-Connected Spin Glasses (2014, methodology): “One very recent development that boosted scientific activity in this field has been the commercialization of D-Wave TwoTM optimizers, which implement the annealing approach by means of a solid-state architecture consisting of hundreds of interlaced superconducting flux qubits [8].”
Open Source (2014, neutral): “D-Wave D-Wave Systems stands out as one of the prominent companies in the development of quantum annealers (Bunyk et al. , 2014).”
Quantum information processing with superconducting circuits: a review (2016, methodology): “The DWave Systems machines are built topdown— scaling up is based on flux qubits and circuits with short coher ence time [123, 124, 486].”
A practical heuristic for finding graph minors (2014, background): “Firstly, the hardware graph is designed to have large treewidth [6], meaning that exact algorithms are of no practical use at the current scales.”
Adiabatic Quantum Computing (2016, background): “Its prominence is explained by the fact that it is easier to analyze than universal AQC, which requires non-stoquastic terms, and by the fact that it is easier to implement experimentally [see, e.g., (Bunyk et al., 2014; Weber et al., 2017)].”