An 800-MHz–6-GHz Software-Defined Wireless Receiver in 90-nm CMOS

By Rahim Bagheri, A. Mirzaei, S. Chehrazi, M. E. Heidari, Minjae Lee, M. Mikhemar, Wai K. Tang, Asad A. Abidi. IEEE Journal of Solid-State Circuits, 2006

430 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/98e74a172db1f0b7079bd2659412ea3ee8713776

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In Electrical and Electronic Engineering

Citations in the corpus

The Path to the Software-Defined Radio Receiver (2007, background): “[23] discuss this in depth, and describe a way to lessen unwanted harmonic mixing.”
A Passive Mixer-First Receiver With Digitally Controlled and Widely Tunable RF Interface (2010, background): “In recent years, innovations in both circuit architectures and process technologies have enabled great programmability in bandwidth [1], oscillation frequency [2]–[4], gain, and modulation type.”
Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling (2008, background): “In the sections below we will briefly derive the conditions for simultaneous balancing, noise canceling and distortion canceling.”
Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference (2009, methodology): “The 8-phase harmonic-rejection (HR) mixers as described in [15] can suppress RF signals around second to sixth LO harmonics but amplitude and phase mismatches limit the achievable HR ratio typically to 30-to-40 dB [2]–[4], [16].”