Polyhedral parallel code generation for CUDA

By Sven Verdoolaege, Juan Carlos Juega, Albert Cohen, José Ignacio Gómez, Christian Tenllado, Francky Catthoor. TACO, 2013

430 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/963a1e639971e7e3a4e6c871cf9c0b410e5532d0

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In Computer Networks and Communications

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Citations in the corpus

MLIR: A Compiler Infrastructure for the End of Moore's Law (2020, methodology): “…[19, 41, 5, 14], and fully automatic ﬂows such as PolyMage [28], Tensor Com-prehensions [52], Stripe [58], Diesel [16], Tiramisu [4] and their underlying polyhedral compilation techniques [17, 54, 8, 55] could co-exist as different code generation paths within an MLIR-based compilation framework.”
Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractions (2018, methodology): “This section reports on the evaluation conducted on an earlier version used for a submission to the PLDI 2018 conference, relying on a modiﬁed version of the PPCG compiler [88].”
TVM: An Automated End-to-End Optimizing Compiler for Deep Learning (2018, background): “The tensor operator scheduling is also related to other works on DSL for GPUs [17, 23, 33, 34] as well as works on polyhedral-based loop transformation [5, 38].”
Ansor : Generating High-Performance Tensor Programs for Deep Learning (2020, methodology): “The polyhedral compilation model [8,52,53] formulates the optimization of programs as an integer linear programming (ILP) problem.”
Bones (2014, methodology): “The most prominent examples are PAR4ALL [Amini et al. 2012] and PPCG [Verdoolaege et al. 2013].”
MLIR: Scaling Compiler Infrastructure for Domain Specific Computation (2021, neutral): “While a full exploration of the design points here is out of scope for this paper, we illustrate aspects of the afﬁne dialect to show the modeling power of MLIR and contrast the afﬁne dialect with past representations [25], [26], [27], [28], [29].”
TVM: An Automated End-to-End Optimizing Compiler for Deep Learning (2018, methodology): “Our tensor operator scheduling is also related to other work on DSL for GPUs [18, 24, 36, 37] and polyhedralbased loop transformation [6,43].”
The Deep Learning Compiler: A Comprehensive Survey (2020, positive): “private) memory by extending PPCG [99] compiler.”
Learning to Optimize Tensor Programs (2018, methodology): “Polyhedral models [5, 42, 41] are a popular choice for Se; they model the loop domains as integer linear constraints.”