Analytical modeling and experimental evaluation of interconnect parasitic inductance on MOSFET switching characteristics

By Y. Xiao, H. Shah, T. P. Chow, R. Gutmann. Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04., 2004

168 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/903c1dabfdc30063a3aa750cf139c271e325b410

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In Electrical and Electronic Engineering

1. Hongchang Li

Citations in the corpus

• A Multiloop Method for Minimization of Parasitic Inductance in GaN-Based High-Frequency DC–DC Converter (2017, background): “Small parasitic inductance in power circuit can cause large voltage spike and ringing, which may result in the increase of switching losses, electromagnetic interference (EMI) issues, or even device breakdown [12]–[17].”