A multiparameter moment-matching model-reduction approach for generating geometrically parameterized interconnect performance models

By L. Daniel, Chin Siong Ong, Sok Chay Low, Kwok Hong Lee, Jacob K. White. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2004

357 citations recorded by the source corpus.

In this paper, we describe an approach for generating accurate geometrically parameterized integrated circuit interconnect models that are efficient enough for use in interconnect synthesis. The model-generation approach presented is automatic, and is based on a multiparameter moment matching model-reduction algorithm. A moment-matching theorem proof for the algorithm is derived, as well as a complexity analysis for the model-order growth. The effectiveness of the technique is tested using a capacitance extraction example, where the plate spacing is considered as the geometric parameter, and a multiline bus example, where both wire spacing and wire width are considered as geometric parameters. Experimental results demonstrate that the generated models accurately predict capacitance values for the capacitor example, and both delay and cross-talk effects over a reasonably wide range of spacing and width variation for the multiline bus example.

Subfields: Electrical and Electronic Engineering, Statistical and Nonlinear Physics

View Paper: https://www.semanticscholar.org/paper/8b014ea4b8c90568b6a12666eb5a08922ecd40c1

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In Electrical and Electronic Engineering

  1. Tan Bui-Thanh
  2. Karen E. Willcox
  3. Youssef M. Marzouk
  4. Omar Ghattas
  5. B. V. B. Waanders
  6. Joris Degroote
  7. Jan A. Vierendeels

In Statistical and Nonlinear Physics

  1. Karen E. Willcox
  2. Youssef M. Marzouk
  3. Joris Degroote
  4. Jan A. Vierendeels
  5. B. V. B. Waanders
  6. Michalis Frangos
  7. Omar Ghattas
  8. Tan Bui-Thanh

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