Memory persistency

By Steven Pelley, Peter M. Chen, Thomas F. Wenisch. International Symposium on Computer Architecture, 2014

319 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture, Information Systems

View Paper: https://www.semanticscholar.org/paper/885c666fbcfd1a10c613496d7a041d01b99c7a39

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. Brandon Lucia
2. Kiwan Maeng
3. Alexei Colin
4. Steven Swanson
5. Dhruva R. Chakrabarti
6. Benjamin Ransford
7. Hans-Juergen Boehm
8. Jian Xu

In Hardware and Architecture

1. Kiwan Maeng
2. Alexei Colin
3. Brandon Lucia
4. Steven Swanson
5. Dhruva R. Chakrabarti
6. Benjamin Ransford
7. Hans-Juergen Boehm
8. Jian Xu

In Information Systems

1. Steven Swanson
2. Brandon Lucia
3. Jian Xu

Citations in the corpus

• Atlas (2014, background): “Extensions and re-laxations [15, 28] of the basic visibility barriers are complementary to our work and Atlas should be able to take advantage of them, if available.”
• An Empirical Guide to the Behavior and Use of Scalable Persistent Memory (2019, methodology): “Common ways to emulate NVM include adding delays to memory accesses in software [32,36,49], using software emulators [43,47], using software simulation [12,31,40], using hardware emulators such as Intel’s Persistent Memory Emulator Platform (PMEP) [21] to limit latency and bandwidth [54, 55, 60], us”
• A simpler, safer programming and execution model for intermittent systems (2015, background): “Memory persistency [26] characterizes memory consistency for persistent memory, focusing on allowable consistency relaxations and correctness despite explicit concurrency and failures.”
• NV-Tree: Reducing Consistency Cost for NVM-based Single Level Systems (2015, unknown): “sg single level system [21, 53, 45].”
• Alpaca: intermittent execution without checkpoints (2017, background): “The increasing availability of non-volatile memory creates a need for models defining the allowable reorderings of non-volatile memory updates and persist actions, which ensure data become persistent [Pelley et al. 2014, 2015].”
• NOVA: A Log-structured File System for Hybrid Volatile/Non-volatile Main Memories (2016, background): “The CPU's memory consistency protocol makes guarantees about the ordering of memory updates, but existing models (with the exception of research proposals [20] [46]) do not provide guarantees on when updates will reach NVMMs.”