Model-driven autotuning of sparse matrix-vector multiply on GPUs

By JeeWhan Choi, Amik Singh, R. Vuduc. ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming, 2010

473 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/7c3f833e3b4062cb367da0ae5eb7e4e0aa535f27

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Networks and Communications

1. John Douglas Owens
2. Yao Zhang
3. Jimeng Sun
4. Brian Vinter
5. R. Vuduc
6. Weifeng Liu

In Hardware and Architecture

1. John Douglas Owens
2. Yao Zhang
3. Jimeng Sun
4. Brian Vinter
5. R. Vuduc
6. Jiajia Li
7. Weifeng Liu

Citations in the corpus

• CSR5: An Efficient Storage Format for Cross-Platform Sparse Matrix-Vector Multiplication (2015, background): “But to accelerate large-scale computation, parallel SpMV is still required to be hand-optimized with specific data storage formats and algorithms [1, 2, 3, 4, 6, 7, 10, 13, 16, 17, 19, 21, 22, 24, 29, 30, 31, 33, 34].”
• A quantitative performance analysis model for GPU architectures (2011, methodology): “We use a naturally 3x3 blocked sparse matrix named QCD, from the benchmark suite of 14 sparse matrices used in prior work by others [ 14 , 20, 22].”
• HiCOO: Hierarchical Storage of Sparse Tensors (2018, background): “There are many options for sparse matrices that tradeoff size, speed, and “fit” to the nonzero structure of a given input matrix and requirements of the application [1–17].”
• GPU-accelerated preconditioned iterative linear solvers (2013, unknown): “SpMV in blocked CSR/ELL format and the model-driven autotuning are presented in [8].”