Codes for network switches
By Zhiying Wang, O. Shaked, Yuval Cassuto, Jehoshua Bruck. 2013
32 citations recorded by the source corpus.
A network switch routes data packets between its multiple input and output ports. Packets from input ports are stored upon arrival in a switch fabric comprising multiple memory banks. This can result in memory contention when distinct output ports request packets from the same memory bank, resulting in a degraded switching bandwidth. To solve this problem, we propose to add redundant memory banks for storing the incoming packets. The problem we address is how to minimize the number of redundant memory banks given some guaranteed contention resolution capability. We present constructions of new switch memory architectures based on different coding techniques. The codes allow decreasing the redundancy by 1/2 or 2/3, depending on the request specifications, compared to non-coding solutions.
Subfields: Computational Theory and Mathematics, Computer Networks and Communications
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In Computational Theory and Mathematics
In Computer Networks and Communications
Citations in the corpus
- PIR with Compressed Queries and Amortized Query Processing (2018, background): “Instead, they target load balancing in distributed storage systems [64, 67] and network switches [75], which have different requirements.”
- Optimal binary switch codes with small query size (2015, background): “al proposed the use of switch codes [7].”