Hysteresis in the transfer characteristics of MoS2 transistors

By A. Di Bartolomeo, L. Genovese, Filippo Giubileo, L. Iemmo, Giuseppe Luongo, Tobias Foller, M. Schleberger. 2017

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We investigate the origin of the hysteresis observed in the transfer characteristics of back-gated field-effect transistors with an exfoliated MoS2 channel. We find that the hysteresis is strongly enhanced by increasing either gate voltage, pressure, temperature or light intensity. Our measurements reveal a step-like behavior of the hysteresis around room temperature, which we explain as water-facilitated charge trapping at the MoS2/SiO2 interface. We conclude that intrinsic defects in MoS2, such as S vacancies, which result in effective positive charge trapping, play an important role, besides H2O and O2 adsorbates on the unpassivated device surface. We show that the bistability associated to the hysteresis can be exploited in memory devices.

Subfields: Electrical and Electronic Engineering, Materials Chemistry

View Paper: https://www.semanticscholar.org/paper/6f31775adf8295d8e870f60cc4351d8d5eca1565

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Citations in the corpus

Electrical characterization of 2D materials-based field-effect transistors (2020, background): “Unfortunately, many back-gated devices that are pervasive across the 2Dmaterials community show significant hysteresis [52, 113] (or even worse, device degradation) frommeasurement to measurement, which makes the differential extraction between the positive and negative B-field measurements prone to”