Auto-tuning a high-level language targeted to GPU codes
By S. Grauer-Gray, Lifan Xu, Robert Searles, Sudhee Ayalasomayajula, John Cavazos. 2012 Innovative Parallel Computing (InPar), 2012
522 citations recorded by the source corpus.
Subfields: Computer Vision and Pattern Recognition, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/69aa0176e522123e8259ca5976aa72e026fae5ab
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In Computer Vision and Pattern Recognition
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Citations in the corpus
- Bones (2014, methodology): “Additionally, PolyBench/GPU [Grauer-Gray et al. 2012] is included, which provides handwritten nonoptimized CUDA code (hand-optimized is not available).”
- End-to-End Deep Learning of Optimization Heuristics (2017, unknown): “2 6 8 PolyBench [33] 1.”
- Neural Code Comprehension: A Learnable Representation of Code Semantics (2018, unknown): “Lines Size Pairs Machine Learning Tensorflow [1] 2,492 16,943,893 220,554 260,250,973 High-Performance Computing AMD APP SDK [9] 123 1,304,669 4,146 45,081,359 BLAS [22] 300 280,782 566 283,856 Benchmarks NAS [57] 268 572,521 1,793 1,701,968 Parboil [59] 151 118,575 2,175 151,916 PolybenchGPU [27] 4”
- Accel-Sim: An Extensible Simulation Framework for Validated GPU Modeling (2018, methodology): “With the exception of a handful of applications with trace-size issues, we run all the applications found in Rodinia 3.1 [9], the CUDA SDK [40], Parboil [65], Polybench [16], CUTLASS [47], our microbenchmark suite, and cutting-edge machine learning workloads from the Deepbench benchmark suite [35].”