First-order incremental block-based statistical timing analysis

By C. Visweswariah, Kaushik Ravindran, Kerim Kalafala, Steven G. Walker, Sambasivan Narayan, D. Beece, Jeff Piaget, Natesan Venkateswaran, Jeffrey G. Hemmett. Proceedings - Design Automation Conference, 2004

760 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/5283a718bd5ebe2fa08aa98ea909de6d1bb1bae8

How researchers see this paper

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In Electrical and Electronic Engineering

1. Massoud Pedram
2. Shahin Nazarian

In Hardware and Architecture

1. Massoud Pedram
2. Shahin Nazarian

Citations in the corpus

• Advances in Computation of the Maximum of a Set of Gaussian Random Variables (2007, background): “Further, if we assume that X and Y are timing random variables at the fan-in edges of a node, the corresponding node and edge criticality estimations [3] require the value of Φ(α).”
• Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods (2006, methodology): “Statistical analysis [58][59] has been used to address the abovementioned shortcomings of corner-based approaches.”