CMOS Digital Integrated Circuits Analysis and Design

By S. Kang, Y. Leblebici. 2002

1,035 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/4b869ca81dceea6da206cc981556a5a649eb4869

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1. Mile K. Stojcev
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Citations in the corpus

• Current starved delay element with symmetric load (2006, background): “Pulse propagation time delay of the second inverter, t p 2 , is independent of V g and is defined as (Kang and Leblebici 2003 ) where C L2 is the output load capacitance of the second stage, V dd is the supply voltage, K n is the technology parameter, and V t is the thresh”