Digital simulation of fault arcs in power systems
By M. Kizilcay, T. Pniok. 2007
213 citations recorded by the source corpus.
Subfields: Control and Systems Engineering, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/490075a0bbf8ac84a286aa43efd182ef8b102be4
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In Control and Systems Engineering
In Electrical and Electronic Engineering
Citations in the corpus
- Modeling and experimental verification of high impedance arcing fault in medium voltage networks (2007, background): “It can be determined when dg/dt=0, synchronized with the instant at which the maximum current occurs [11].”