Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits

By Dmitri E. Nikonov, Ian A. Young. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2015

318 citations recorded by the source corpus.

A new benchmarking of beyond-CMOS exploratory devices for logic integrated circuits is presented. It includes new devices with ferroelectric, straintronic, and orbitronic computational state variables. Standby power treatment and memory circuits are included. The set of circuits is extended to sequential logic, including arithmetic logic units. The conclusion that tunneling field-effect transistors are the leading low-power option is reinforced. Ferroelectric transistors may present an attractive option with faster switching delay. Magnetoelectric effects are more energy efficient than spin transfer torque, but the switching speed of magnetization is a limitation. This article enables a better focus on promising beyond-CMOS exploratory devices.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/43dce59819ff5473112963d4e49325e5b49d27bc

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In Electrical and Electronic Engineering

1. Long-qing Chen
2. Robert M. Wallace
3. Mauricio Terrones
4. John Robertson

Citations in the corpus

• A roadmap for electronic grade 2D materials (2019, methodology): “(b) Switching energy versus delay for 32-bit adders using various 2D materials for two technology nodes, namely the 2019 and the 2028 node (adapted with permission from [18], © 2015 IEEE).”