Behavioral consistency of C and Verilog programs using bounded model checking

By Edmund M. Clarke, Daniel Kroening, Karen Yorav. 2003

314 citations recorded by the source corpus.

We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program are unwound and translated into a formula that represents behavioral consistency. The formula is then checked using a SAT solver. We are able to translate C programs that include side effects, pointers, dynamic memory allocation, and loops with conditions that cannot be evaluated statically. We describe experimental results on various reactive circuits and programs, including a small processor given in Verilog and its Instruction Set Architecture given in ANSI-C.

Subfields: Artificial Intelligence, Computational Theory and Mathematics, Program Analysis & Verification

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Artificial Intelligence

  1. Armando Solar-Lezama
  2. Miltiadis Allamanis
  3. Charles Sutton
  4. Rishabh Singh
  5. Earl T. Barr
  6. Premkumar T. Devanbu
  7. Sanjit A. Seshia
  8. Sahil Bhatia

In Computational Theory and Mathematics

  1. Armando Solar-Lezama
  2. Daniel Kroening
  3. Rastislav Bodík
  4. Vijay Victor D'Silva
  5. Georg Weissenbacher
  6. Sanjit A. Seshia
  7. Helmut Veith
  8. Martin Franz

In Program Analysis & Verification

  1. Miltiadis Allamanis
  2. Charles Sutton
  3. Armando Solar-Lezama
  4. Earl T. Barr
  5. Premkumar T. Devanbu
  6. Rastislav Bodík
  7. Vijay Victor D'Silva
  8. Flavio Lerda

Citations in the corpus