Computer Architecture: A Quantitative Approach

By David A. Patterson, John L. Hennessy. 1969

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Citations in the corpus

Meep: A flexible free-software package for electromagnetic simulations by the FDTD method (2010, background): “One of the dominant factors in performance on modern computer systems is not arithmetic, but memory: random memory access is far slower than arithmetic, and the organization of memory into a hierarchy of caches is designed to favor locality of access [70].”
TinyGarble: Highly Compressed and Scalable Sequential Garbled Circuits (2015, background): “, x86 ISA) which includes more complex multi-step instructions [33].”
Xtensa: A Configurable and Extensible Processor (2000, methodology): “We built the first implementation of Xtensa around a traditional RISC five-stage pipeline (see Figure 2), with a 32-bit address space.(10) The processor accesses the instruction cache and tags in the first half of the I stage and computes the cache hit or miss signal in the second half.”
Sparsity: Optimization Framework for Sparse Matrix Kernels (2004, methodology): “In cache blocking, the set of values in the cache is not under complete control of the software; hardware controls the selection of data values in each level of cache according to its policies on replacement, associativity, and write strategy [12].”
Energy-Constrained Compression for Deep Neural Networks via Weighted Sparse Projection and Layer Input Masking (2018, background): “The challenge in modeling the data access energy is that modern hardware is equipped with a multi-level memory hierarchy in order to improve speed and save energy (Hennessy & Patterson, 2011).”
Design and evaluation of a conit-based continuous consistency model for replicated services (2002, methodology): “Numerous memory consistency models [Keleher et al. 1992; Patterson and Hennessy 1996; Shen et al. 1999; Zekauskas et al. 1994] have been proposed in the context of multiprocessors/distributed shared memory.”
A common database approach for OLTP and OLAP using an in-memory column database (2009, background): “According to Hennessy, the diﬃculty of creating parallel processing programs is to break up a program into equal-sized pieces, which then can be processed in parallel without much synchronization [12].”
Predicting Secret Keys Via Branch Prediction (2007, methodology): “Thus, we refer the reader to [ PH , Sha, She] for a thorough treatment of this topics.”
Horton Tables: Fast Hash Tables for In-Memory Data-Intensive Computing (2016, unknown): “4) [30] and Keckler et al.”
Parallel sampling-based motion planning with superlinear speedup (2012, background): “But due to Amdahl’s law [16], parallel performance will taper as the number of samples increases and nearest neighbor checks begin to dominate as discussed in Sec.”
End-to-End Learning of Energy-Constrained Deep Neural Networks (2018, background): “The challenge in modeling the data access energy is that modern hardware is equipped with a multi-level memory hierarchy in order to improve speed and save energy [16].”