A 256-kb 65-nm Sub-threshold SRAM Design for Ultra-Low-Voltage Operation

By Benton H. Calhoun, Anantha P. Chandrakasan. IEEE Journal of Solid-State Circuits, 2007

471 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/209aa4b8aa7743a37e400e653ebec177ad5684ef

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In Electrical and Electronic Engineering

1. Massimo Alioto

Citations in the corpus

• Ultra-Low Power VLSI Circuit Design Demystified and Explained: A Tutorial (2012, methodology): “The above discussed read buffer permits to decouple the write and read margins, and the read margin becomes essentially equal to the hold margin [44], [58], [59].”