Use of SIMD Vector Operations to Accelerate Application Code Performance on Low-Powered ARM and Intel Platforms

By Gaurav Mitra, Beau Johnston, Alistair P. Rendell, Eric C. McCreath, Jun Zhou. 2013

94 citations recorded by the source corpus.

Augmenting a processor with special hardware that is able to apply a Single Instruction to Multiple Data(SIMD) at the same time is a cost effective way of improving processor performance. It also offers a means of improving the ratio of processor performance to power usage due to reduced and more effective data movement and intrinsically lower instruction counts. This paper considers and compares the NEON SIMD instruction set used on the ARM Cortex-A series of RISC processors with the SSE2 SIMD instruction set found on Intel platforms within the context of the Open Computer Vision (OpenCV) library. The performance obtained using compiler auto-vectorization is compared with that achieved using hand-tuning across a range of five different benchmarks and ten different hardware platforms. On the ARM platforms the hand-tuned NEON benchmarks were between 1.05× and 13.88× faster than the auto-vectorized code, while for the Intel platforms the hand-tuned SSE benchmarks were between 1.34× and 5.54× faster.

Subfields: Computer Vision and Pattern Recognition, Electrical and Electronic Engineering, Hardware and Architecture, ML Systems & Hardware

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Computer Vision and Pattern Recognition

  1. Samyam Rajbhandari
  2. Yuxiong He
  3. Olatunji Ruwase
  4. Reza Yazdani Aminabadi
  5. Minjia Zhang
  6. Dan Alistarh
  7. Elias Frantar

In Hardware and Architecture

  1. Yuxiong He
  2. Olatunji Ruwase
  3. Jared Casper
  4. Mohammad Shoeybi
  5. Bryan Catanzaro
  6. Vijay Anand Korthikanti
  7. Jie Tang

Citations in the corpus