DRAMsim3: A Cycle-Accurate, Thermal-Capable DRAM Simulator
By Shun-Jie Li, Zhiyuan Yang, D. Reddy, Ankur Srivastava, Bruce L. Jacob. IEEE computer architecture letters, 2020
337 citations recorded by the source corpus.
DRAM technology has developed rapidly in recent years. Several industrial solutions offer 3D packaging of DRAM and some are envisioning the integration of CPU and DRAM on the same die. These solutions allow higher density and better performance and also lower power consumption in DRAM designs. However, accurate simulation tools have not kept up with DRAM technology, especially for the modeling of 3D DRAMs. In this letter we present a cycle-accurate, validated DRAM simulator, and DRAMsim3, which offers the best simulation performance and feature sets among existing cycle-accurate DRAM simulators. DRAMsim3 is also the first DRAM simulator to offer runtime thermal modeling alongside with performance modeling.
Subfields: Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/09e5d72d193a902c622e68fa45f1ec8133e0ec0c
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In Electrical and Electronic Engineering
In Hardware and Architecture
Citations in the corpus
- The gem5 Simulator: Version 20.0+ (2020, methodology): “Although this is not a cycle-accurate DRAM model like DRAMSim [46, 62, 73] or Ramulator [42], it is nearly as accurate while providing more flexibility and higher performance [32].”