Chisel: Constructing hardware in a Scala embedded language
By Jonathan Bachrach, Huy Vo, B. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic. DAC Design Automation Conference 2012, 2012
1,112 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/021464b67bb87cf6132b2eb5b0c4a61f31ec2775
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Electrical and Electronic Engineering
- Brendan Dolan-Gavitt
- Edward A. Lee
- Siddharth Garg
- Ramesh Karri
- Margaret Martonosi
- Yonggang Wen
- Miyuru Dayarathna
In Hardware and Architecture
- Brendan Dolan-Gavitt
- Nadathur Rajagopalan Satish
- Edward A. Lee
- Siddharth Garg
- Ramesh Karri
- Margaret Martonosi
- Alberto L. Sangiovanni-Vincentelli
- Yonggang Wen
Citations in the corpus
- VeriGen: A Large Language Model for Verilog Code Generation (2023, methodology): “Related works also consider modernizing HDLs by adopting features and languages typically used in software development, for instance Chisel [3] based on Scala.”
- The Past, Present and Future of Cyber-Physical Systems: A Focus on Models (2015, methodology): “This architecture is based on the open-source RISC-V [31], is implemented using Chisel [32] and is deployed as an FPGA soft core and a C++ cycle-accurate simulator.”
- Graphicionado: A high-performance and energy-efficient accelerator for graph analytics (2016, methodology): “Overall Design We implemented each pipeline stage of Graphicionado in Chisel [6], generated Verilog, and synthesized”