Measuring the Gap Between FPGAs and ASICs

By Ian Kuon, Jonathan Rose. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006

1,456 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/0086b1d36b41ab83bfddc59d5da228090c4688d2

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Steven K. Reinhardt
2. Michael Nicolaidis

In Hardware and Architecture

1. Shuai Che
2. Steven K. Reinhardt
3. Michael Nicolaidis

Citations in the corpus

• Siwa: A custom RISC-V based system on chip (SOC) for low power medical applications (2020, positive): “As such, a good alternative is the use of field programmable arrays (FPGAs) [1], but these devices are often not able to meet the requirements of small form factor and capacity at the same time, and in general, achieve worse power consumption and speed performance compared to an application specific”
• Digital Beamforming-Based Massive MIMO Transceiver for 5G Millimeter-Wave Communications (2018, neutral): “than FPGAs [24].”
• Toward embedded detection of polyps in WCE images for early diagnosis of colorectal cancer (2014, background): “By considering the above state-of-the-art, the fact that an FPGA also consumes 12 times more dynamic power than an equivalent ASIC on average [31] and the power consumption of Virtex 5, we can estimate that the power consumption due to the processing will be approximatively under the 100 of μW.”
• LINQits: big data on little clients (2013, background): “Although we do not present ASIC results in this paper, it is a reasonable conjecture that a hardened HAT engine could significantly reduce the core power consumption relative to the FPGA by another factor of 10-100 times [28].”
• FPGA Architecture: Survey and Challenges (2008, neutral): “1 Introduction Field-Programmable Gate Arrays (FPGAs) are pre-fabricated silicon devices that can be electrically programmed to become almost any kind of digital circuit or system.”
• AWB-GCN: A Graph Convolutional Network Accelerator with Runtime Workload Rebalancing (2019, background): “Comparing to ASIC, the reconfigurable routing switches on FPGA chip consume extra energy, making the energy efficiency of FPGA design lower (approximately 14 × according to the numbers reported by Kuon [48]).”